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 MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MRFIC0914/D
The MRFIC Line
900 MHz LDMOS Integrated Power Amplifier
MRFIC0914
900 MHz PAGING POWER AMPLIFIER Si MONOLITHIC INTEGRATED CIRCUIT
This integrated circuit is intended for two-way paging applications and for other Industrial, Scientific and Medical (ISM) at 900 MHz band applications. The three stage design is implemented in Motorola's low cost, high performance LDMOS process and housed in a low-cost surface mount SOIC package. Input and output matching is implemented off-chip for maximum flexibility while interstage matching is on-chip. A power control pin is included allowing 60 dB dynamic range. * 30.5 dBm Output Power for 3 dBm Input Power at 900 MHz * 32 dB Typ Small Signal Gain * 40% Efficiency Min at 30.5 dBm Output Power * 4.0 to 5.5 Volt Operation * Low-Cost, Low Profile Plastic SOIC Package * Order MRFIC0914R2 for Tape and Reel. R2 Suffix = 2,500 Units per 16 mm, 13 inch Reel. * Device Marking = M0914
CASE 751B-05 (SOIC-16)
ABSOLUTE MAXIMUM RATINGS (TA = 25C unless otherwise noted)
Rating Supply Voltage Supply Current Power Control Voltage Input Power Ambient Operating Temperature Storage Temperature Thermal Resistance, Junction to Case Symbol VD1, VD2, VD3 IDtotal VCNTRL Pin TA Tstg JC Value 9 2 4.8 6 - 30 to + 80 - 65 to +150 26 Unit Vdc Adc Vdc dBm C C C/W
VCNTRL GND VD2 GND GND RF OUT/VD3 GND GND
1 CONTROL 2 3 4 5 6 7 8
16 GND 15 GND 14 RF IN 13 GND 12 GND 11 VD1 10 GND 9 GND
Pin Connections and Functional Block Diagram
REV 2
MOTOROLA RF (c) Motorola, Inc. 1997 DEVICE DATA
MRFIC0914 1
RECOMMENDED OPERATING RANGES
Parameter Supply Voltage Power Control Voltage RF Frequency Range Symbol VD1, VD2, VD3 VCNTRL fRF Value 3.6 to 5.8 0 to 4.8 890 to 928 Unit Vdc Vdc MHz
ELECTRICAL CHARACTERISTICS (VD1, VD2, VD3 = 4.8 V, f = 900 MHz, Pin = 3 dBm, 1 ms, 10% duty cycle, VCNTRL Adjusted for
IDtotal = 583 mA, TA = 25C unless otherwise noted. Measured in Circuit Configuration Shown in Figure 1.) Characteristic Output Power Efficiency Output Power at 1 dB Gain Compression Saturated Output Power Output Third Order Intercept Point Dynamic Range (VCNTRL = 0 to 4.8 V) Input Return Loss Output Power, Low Voltage (VD1, VD2, VD3 = 3.84 V) Spurious Output (Load VSWR = 20:1, All Phase Angles) Harmonic Output (With External Matching Circuit) Min 1.12 40 -- -- -- -- 7 0.56 -- -- Typ -- -- 29 31 36 60 12 -- -60 -- Max -- -- -- -- -- -- -- -- -50 -45 Unit W % dBm dBm dBm dB dB W dBc dBc
VCNTRL C8
1 2
CONTROL
16 15 14 13 12 11 C6 C7 10 9 VD3 L2 RF INPUT
VD2 VD3 C1 C10 RF OUT C9 L 3 T2 C3 T1 C2 C4 L 1 C5
3 4 5 6 7 8
C1, C7 -- 0.01 f C2, C6, C8 -- 33 pF C3 -- 12 pF C4 -- 1.0 F
C5, C10 -- 100 pF C9 -- 2.1 pF L1 -- 33 nH L2 -- 5.6 nH
L3 -- 3.3 nH T1 -- 50 MICROSTRIP, 7.5 @ 900 MHz T2 -- 50 MICROSTRIP, 31.6 @ 900 MHz BOARD MATERIAL -- 18 MIL FR4
Figure 1. Application Circuit Configuration
MRFIC0914 2
MOTOROLA RF DEVICE DATA
3 4 3 2 3 0 2 8 2 6 2 4 2 2 2 -10 0
5.8 V Pout , OUTPUT POWER (dBm)
4.8 V VD1, VD2, VD3 = 3.6 V
TA = 25C f = 900 MHz VCNTRL = 4 V -7.5 -5 -2.5 0 2.5 5
3 2 3 0 2 8 2 6 2 4 2 2 2 0 1 -10 8
Pout , OUTPUT POWER (dBm)
-35C 25C TA = 85C
f = 900 MHz VCNTRL = 4 V VD1, VD2, VD3 = 4.8 V -7.5 -5 -2.5 0 2.5 5
Pin, INPUT POWER (dBm)
Pin, INPUT POWER (dBm)
Figure 2. Output Power versus Input Power
Figure 3. Output Power versus Input Power
700 TOTAL SUPPLY CURRENT (mA) TOTAL SUPPLY CURRENT (mA) TA = 25C f = 900 MHz VCNTRL = 4 V 5.8 V
700 650 600 550 500 450 400 -10 25 C -35C
650
4.8 V 600
550 VD1, VD2, VD3 = 3.6 V 500
TA = 85C f = 900 MHz VCNTRL = 4 V VD1, VD2, VD3 = 4.8 V -7.5 -5 -2.5 0 2.5 5
450 -10
-7.5
-5
-2.5
0
2.5
5
Pin, INPUT POWER (dBm)
Pin, INPUT POWER (dBm)
Figure 4. Supply Current versus Input Power
Figure 5. Supply Current versus Input Power
TOTAL QUIESCENT CURRENT (mA)
Pout , OUTPUT POWER (dBm)
4 0 3 0 2 0 1 0 0 -10 -20 -30 -40 0 1 2 5.8 V
900 5.8 V 800 700 600 500 400 300 200 100 0 3 4 5 0 1 2 3 4 5 VCNTRL, CONTROL VOLTAGE (VOLTS) VCNTRL, CONTROL VOLTAGE (VOLTS) TA = 85C -35C VD1, VD2, VD3 = 3.6 to 5.8 V 25C
4.8 V
VD1, VD2, VD3 = 3.6 V TA = 25C f = 900 MHz Pin = 3 dBm
Figure 6. Output Power versus VCNTRL
Figure 7. Quiescent Current versus VCNTRL
MOTOROLA RF DEVICE DATA
MRFIC0914 3
30.75
620 TOTAL SUPPLY CURRENT (mA)
Pout , OUTPUT POWER (dBm)
30.50
IDtotal
600
30.25
TA = 25C f = 900 MHz VCNTRL = 4 V, 5 ms PULSE VD1, VD2, VD3 = 4.8 V Pin = 3 dBm 0 20 40 60
Pout 580
30.00 80 DUTY CYCLE (%)
560 100
Figure 8. Output Power versus Duty Cycle
f MHz 800 850 900 950 1000 R 48.8 49.0 49.0 49.4 49.8
Zin () jX -16.3 -17.9 -19.6 -21.2 -23.1 R 2.56 3.30 2.80 3.94 3.95
ZOL* () jX 14.3 14.4 13.1 14.0 12.6
Table 1. Device Impedances Derived from Circuit Characterization
APPLICATIONS INFORMATION
DESIGN PHILOSOPHY The MRFIC0914 three stage LDMOS integrated power amplifier was designed for low cost and flexibility. While the target application was two-way paging, the device can be used in a variety of 800 to 1000 MHz applications and it is particularly suited to burst mode digital transmissions with constant envelope modulation schemes. Only one supply is required. The VCNTRL pin allows the setting of the gate bias of the three stages simultaneoulsy for optimum gain and efficiency and serves as a transmit control with more than 60 dB dynamic range. CIRCUIT DETAILS In Figure 1, the 900 MHz applications circuit, note that each stage has a separate supply pin, including the RF Output for the third stage. Care should be taken in bypassing these supply connections to avoid low frequency oscillation. Chip capacitors should be mounted as close to the leads and ground vias as possible. Ground vias should be provided close to the indicated ground leads as well. L1 is a bias choke supplying the third stage and could be replaced with a quarter wave line or air-wound inductor. EVALUATION BOARDS Evaluation boards are available for RF Monolithic Integrated Circuits by adding a "TF" to the device type. For a complete list of currently available boards and ones in development for newly introduced products, please consult your local Motorola Distributor or Sales Office. RF performance is sensitive to the output matching network. C9 and L3 form a second harmonic trap which enhances efficiency. Placement of C3 along the 50 line at the device output is critical to gain and efficiency. L2, the input matching inductor, is optional. Without this inductor, the input match is still typically better than 2:1 VSWR. It should be note that Figure 1 does not portray the parasitics of the chip components nor their solder mounting pads. The board material is 18 mil dielectric thickness FR4. The impedances shown in Table 1 were derived from circuit characterization and are given as an aid to original designs.
MRFIC0914 4
MOTOROLA RF DEVICE DATA
PACKAGE DIMENSIONS
-ANOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 BSC 0.25 0.19 0.25 0.10 7 0 6.20 5.80 0.50 0.25 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 7 0 0.229 0.244 0.010 0.019
16
9
-B1 8
P 8 PL 0.25 (0.010)
M
B
M
G F
K C -TSEATING PLANE
R X 45
M D 16 PL 0.25 (0.010)
M
J
TB
S
A
S
CASE 751B-05 ISSUE J
MOTOROLA RF DEVICE DATA
MRFIC0914 5
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 303-675-2140 or 1-800-441-2447 JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. 81-3-5487-8488
MfaxTM: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, - US & Canada ONLY 1-800-774-1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 INTERNET: http://motorola.com/sps
MRFIC0914 6
MRFIC0914/D MOTOROLA RF DEVICE DATA


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